426 search results - page 12 / 86 » Power-Sensitive Multithreaded Architecture |
PDP
2002
IEEE
14 years 1 months ago
2002
IEEE
Despite the explosive new interest in Distributed Computing, bringing software — particularly legacy software — to parallel platforms remains a daunting task. The Self Distrib...
SP
1999
IEEE
14 years 28 days ago
1999
IEEE
A TCB and security kernel architecture for supporting multi-threaded, queue-driven transaction processing applications in a multilevel secure environment is presented. Our design ...
ISCAPDCS
2003
13 years 10 months ago
2003
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...
ASPLOS
2000
ACM
14 years 1 months ago
2000
ACM
This paper presents the first analysis of operating system execution on a simultaneous multithreaded (SMT) processor. While SMT has been studied extensively over the past 6 years,...
ICPP
2008
IEEE
14 years 3 months ago
2008
IEEE
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...