426 search results - page 31 / 86 » Power-Sensitive Multithreaded Architecture |
ICDE
2001
IEEE
14 years 10 months ago
2001
IEEE
In this paper, we present READY, a multi-threaded implementation of the CORBA Notification Service. The main contribution of our work is the design and development of scalable sol...
ISCA
1989
IEEE
14 years 22 days ago
1989
IEEE
: We explore the question: “What can a von Neumann processor borrow from dataflow to make it more suitable for a multiprocessor?’’ Starting with a simple, “RISC-like” ins...
POPL
2010
ACM
13 years 7 months ago
2010
ACM
S-NET is a declarative coordination language and component technology aimed at modern multi-core/many-core architectures and systems-on-chip. It builds on the concept of stream pr...
IPPS
2010
IEEE
13 years 6 months ago
2010
IEEE
Line-rate data traffic monitoring in high-speed networks is essential for network management. To satisfy the line-rate requirement, one can leverage multi-core architectures to par...
HPCA
2012
IEEE
12 years 4 months ago
2012
IEEE
Multiprocessor architectures that continuously execute atomic blocks (or chunks) of instructions can improve performance and software productivity. However, all of the prior propo...