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PLDI
2003
ACM
14 years 23 days ago
Taming the IXP network processor
We compile Nova, a new language designed for writing network processing applications, using a back end based on integer-linear programming (ILP) for register allocation, optimal b...
Lal George, Matthias Blume
FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
14 years 1 months ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...
RTSS
2003
IEEE
14 years 24 days ago
Experimental Evaluation of Code Properties for WCET Analysis
This paper presents a quantification of the timing effects that advanced processor features like data and instruction cache, pipelines, branch prediction units and out-oforder ex...
Antoine Colin, Stefan M. Petters
IWMM
2011
Springer
204views Hardware» more  IWMM 2011»
12 years 10 months ago
Multicore garbage collection with local heaps
In a parallel, shared-memory, language with a garbage collected heap, it is desirable for each processor to perform minor garbage collections independently. Although obvious, it i...
Simon Marlow, Simon L. Peyton Jones
CASES
2008
ACM
13 years 9 months ago
Cache-aware cross-profiling for java processors
Performance evaluation of embedded software is essential in an early development phase so as to ensure that the software will run on the embedded device's limited computing r...
Walter Binder, Alex Villazón, Martin Schoeb...