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ECRTS
2009
IEEE
13 years 9 months ago
Precise Worst-Case Execution Time Analysis for Processors with Timing Anomalies
This paper explores timing anomalies in WCET analysis. Timing anomalies add to the complexity of WCET analysis and make it hard to apply divide-and-conquer strategies to simplify ...
Raimund Kirner, Albrecht Kadlec, Peter P. Puschner
DDECS
2006
IEEE
146views Hardware» more  DDECS 2006»
14 years 2 months ago
Automatic Identification of Timing Anomalies for Cycle-Accurate Worst-Case Execution Time Analysis
Abstract-- Hard real-time systems need methods to determine upper bounds for their execution times, usually called worst-case execution times. Timing anomalies are counterintuitive...
Jochen Eisinger, Ilia Polian, Bernd Becker, Alexan...
ISORC
2008
IEEE
14 years 5 months ago
Obstacles in Worst-Case Execution Time Analysis
The analysis of the worst-case execution time (WCET) requires detailed knowledge of the program behavior. In practice it is still not possible to obtain all needed information aut...
Raimund Kirner, Peter P. Puschner
CASES
2005
ACM
14 years 1 months ago
An Esterel processor with full preemption support and its worst case reaction time analysis
The concurrent synchronous language Esterel allows proto treat reactive systems in an abstract, concise manner. An Esterel program is typically first translated into other, non-s...
Xin Li, Jan Lukoschus, Marian Boldt, Michael Harde...
BIRTHDAY
2006
Springer
14 years 2 months ago
Realistic Worst-Case Execution Time Analysis in the Context of Pervasive System Verification
We describe a gate level design of a FlexRay-like bus interface. An electronic control unit (ECU) is obtained by integrating this interface into the design of the verified VAMP pro...
Steffen Knapp, Wolfgang J. Paul