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VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
14 years 8 months ago
Integrated On-Chip Storage Evaluation in ASIP Synthesis
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
VLSI
2007
Springer
14 years 1 months ago
An efficient H.264 intra frame coder system design
In this paper, we present an efficient H.264 / MPEG4 Part 10 Intra Frame Coder System. The system achieves real-time performance for portable applications with low hardware cost, ...
Ilker Hamzaoglu, Ozgur Tasdizen, Esra Sahin
DAC
2012
ACM
11 years 10 months ago
WCET-centric partial instruction cache locking
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...
Huping Ding, Yun Liang, Tulika Mitra
PPOPP
2006
ACM
14 years 1 months ago
Minimizing execution time in MPI programs on an energy-constrained, power-scalable cluster
Recently, the high-performance computing community has realized that power is a performance-limiting factor. One reason for this is that supercomputing centers have limited power ...
Robert Springer, David K. Lowenthal, Barry Rountre...
OSDI
2008
ACM
14 years 7 months ago
Run-time Energy Consumption Estimation Based on Workload in Server Systems
This paper proposes to develop a system-wide energy consumption model for servers by making use of hardware performance counters and experimental measurements. We develop a real-t...
Adam Lewis, Soumik Ghosh, Nian-Feng Tzeng