Process variations have become a serious concern for nanometer technologies. The interconnect and device variations include interand intra-die variations of geometries, as well as...
Xiaoning Qi, Alex Gyure, Yansheng Luo, Sam C. Lo, ...
This paper presents our research on devising a dependability assessment method for the upcoming OGSA 3.0 middleware using network level fault injection. We compare existing DCE mi...
TIS (Test Instruction Set) is an instruction level technique for CPU core self-testing. This method is based on enhancing a CPU instruction set with test instructions. TIS replace...
Saeed Shamshiri, Hadi Esmaeilzadeh, Zainalabedin N...
In the context of open source development or software evolution, developers are often faced with test suites which have been developed with no apparent rationale and which may nee...
Abstract—The Future Internet will be a complex interconnection of services, applications, content and media, on which our society will become increasingly dependent. Time to mark...
Arthur I. Baars, Kiran Lakhotia, Tanja E. J. Vos, ...