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GLVLSI
2006
IEEE
101views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Measurement and characterization of pattern dependent process variations of interconnect resistance, capacitance and inductance
Process variations have become a serious concern for nanometer technologies. The interconnect and device variations include interand intra-die variations of geometries, as well as...
Xiaoning Qi, Alex Gyure, Yansheng Luo, Sam C. Lo, ...
SRDS
2003
IEEE
14 years 1 months ago
Assessing the Dependability of OGSA Middleware by Fault Injection
This paper presents our research on devising a dependability assessment method for the upcoming OGSA 3.0 middleware using network level fault injection. We compare existing DCE mi...
Nik Looker, Jie Xu
ATS
2004
IEEE
97views Hardware» more  ATS 2004»
13 years 11 months ago
Test Instruction Set (TIS) for High Level Self-Testing of CPU Cores
TIS (Test Instruction Set) is an instruction level technique for CPU core self-testing. This method is based on enhancing a CPU instruction set with test instructions. TIS replace...
Saeed Shamshiri, Hadi Esmaeilzadeh, Zainalabedin N...
QSIC
2008
IEEE
14 years 2 months ago
Using Machine Learning to Refine Black-Box Test Specifications and Test Suites
In the context of open source development or software evolution, developers are often faced with test suites which have been developed with no apparent rationale and which may nee...
Lionel C. Briand, Yvan Labiche, Zaheer Bawar
FEDCSIS
2011
76views more  FEDCSIS 2011»
12 years 7 months ago
Search--Based Testing, the Underlying Engine of Future Internet Testing
Abstract—The Future Internet will be a complex interconnection of services, applications, content and media, on which our society will become increasingly dependent. Time to mark...
Arthur I. Baars, Kiran Lakhotia, Tanja E. J. Vos, ...