47 search results - page 10 / 10 » Prefetch-Aware DRAM Controllers |
SIGCOMM
2004
ACM
14 years 4 months ago
2004
ACM
All Internet routers contain buffers to hold packets during times of congestion. Today, the size of the buffers is determined by the dynamics of TCP’s congestion control algor...
ACSAC
2008
IEEE
14 years 5 months ago
2008
IEEE
Main memory contains transient information for all resident applications. However, if memory chip contents survives power-off, e.g., via freezing DRAM chips, sensitive data such a...