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FPL
2004
Springer
112views Hardware» more  FPL 2004»
14 years 3 months ago
Automating the Layout of Reconfigurable Subsystems via Template Reduction
When designing SoCs, a unique opportunity exists to generate custom FPGA architectures that are specific to the application domain in which the device will be used. The inclusion o...
Shawn Phillips, Akshay Sharma, Scott Hauck
IRI
2007
IEEE
14 years 3 months ago
Reuse Technique in Hardware Design
The paper presents a technique for the design of digital systems on the basis of reusable hardware templates, which are circuits with modifiable functionality that might be custom...
Valery Sklyarov, Iouliia Skliarova
IPPS
2007
IEEE
14 years 3 months ago
QUKU: A FPGA Based Flexible Coarse Grain Architecture Design Paradigm using Process Networks
DSP applications can be suitably represented using Process Network Models. This paper uses a modification of Kahn Process Network to solve the problem of finding an optimum arch...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker
HT
1998
ACM
14 years 1 months ago
Pushing Reuse in Hypermedia Design: Golden Rules, Design Patterns and Constructive Templates
Reuse is increasingly strategic for reducing cost and improving quality of hypermedia design and development. In this paper, based on the design and development of a real hypermed...
Marc Nanard, Jocelyne Nanard, Paul Kahn
ICANN
2009
Springer
14 years 4 months ago
Multimodal Sparse Features for Object Detection
In this paper the sparse coding principle is employed for the representation of multimodal image data, i.e. image intensity and range. We estimate an image basis for frontal face i...
Martin Haker, Thomas Martinetz, Erhardt Barth