Wire and gate delays are accounted to have equal, or nearly equal, effect on circuit behavior in modern design techniques. This paper introduces a new approach to verify circuits ...
Alex Kondratyev, Oriol Roig, Lawrence Neukom, Karl...
A simulation model is composed of inputs and logic; the inputs represent the uncertainty or randomness in the system, while the logic determines how the system reacts to the uncer...
It is frequent in practice that different logical XML schemas representing the same reality from different viewpoints exist. There is also usually a conceptual diagram modeling th...
We develop a notion of spatial-behavioral typing suitable to discipline concurrent interactions and resource usage in distributed object systems. Our type structure reflects a res...
A parallel file may be physically stored on several independent disks and logically partitioned by several processors. This paper presents general algorithms for mapping between t...