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ASYNC
1997
IEEE
103views Hardware» more  ASYNC 1997»
14 years 7 days ago
Efficient Timing Analysis Algorithms for Timed State Space Exploration
This paper presents new timing analysis algorithms for efficient state space exploration during timed circuit synthesis. Timed circuits are a class of asynchronous circuits that i...
Wendy Belluomini, Chris J. Myers
WSC
2007
13 years 11 months ago
Simulation of passenger check-in at a medium-sized US airport
Delays in the check-in system at an airport vary with times of the day, day of the week, and types of check-in modes chosen by the passengers. Extensive data collection of the che...
Simone Appelt, Rajan Batta, Li Lin, Colin G. Drury
AIPS
1996
13 years 10 months ago
Planning for Manufacturing Workpieces by Storing, Indexing and Replaying Planning Decisions
Planning for manufacturing workpiecesis a complex task that requires the interaction of a domain-specific reasoner and a generic planning mechanism.In this paper wepresent an arch...
Hector Muñoz-Avila, Frank Weberskirch
IJCAI
1989
13 years 9 months ago
Unrestricted And-Parallel Execution of Logic Programs with Dependency Directed Backtracking
A model of unrestricted And-parallel execution for logic programs is described, based on Dependency Directed Backtracking (DDBT) aimed at improving the efficiency of execution whi...
Nikos Drakos
WCE
2007
13 years 9 months ago
A Note on Tornado Diagrams in Interval Decision Analysis
—The research efforts of the DECIDE Research Group have resulted in a decision tool capable of handling imprecise information in complex decision situations. Some of the research...
Jim Idefeldt, Mats Danielson