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FPL
1997
Springer
130views Hardware» more  FPL 1997»
13 years 12 months ago
Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research
: The paper first proposes requirements for an ideal platform for codesign research. A new board developed at Imperial College, the Riley-2, is shown to meet these requirements. It...
Patrick I. Mackinlay, Peter Y. K. Cheung, Wayne Lu...
DATE
2003
IEEE
113views Hardware» more  DATE 2003»
14 years 1 months ago
Design Space Exploration for a Wireless Protocol on a Reconfigurable Platform
This paper describes a design space exploration experiment for a real application from the embedded networking domain - the physical layer of a wireless protocol. The application ...
Laura Vanzago, Bishnupriya Bhattacharya, Joel Camb...
ARC
2010
Springer
167views Hardware» more  ARC 2010»
13 years 11 months ago
Systolic Algorithm Mapping for Coarse Grained Reconfigurable Array Architectures
Coarse Grained Reconfigurable Array (CGRA) architectures give high throughput and data reuse for regular algorithms while providing flexibility to execute multiple algorithms on th...
Kunjan Patel, Chris J. Bleakley
DAC
2001
ACM
14 years 8 months ago
Re-Configurable Computing in Wireless
Wireless communications requires a new approach to implement the algorithms for new standards. The computational demands of these standards are outstripping the ability of traditi...
Bill Salefski, Levent Caglar
ISCAS
2005
IEEE
154views Hardware» more  ISCAS 2005»
14 years 1 months ago
An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arrays
—This paper presents a memory-conscious mapping methodology of computational intensive applications on coarse-grain reconfigurable arrays. By exploiting the inherent abundant amo...
Michalis D. Galanis, Gregory Dimitroulakos, Consta...