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» Process Isolation for Reconfigurable Hardware
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ASAP
2008
IEEE
167views Hardware» more  ASAP 2008»
14 years 2 months ago
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms
Process technology has reduced in size such that it is possible to implement complete applicationspecific architectures as Systems-on-Chip (SoCs) using both Application-Specific I...
David Dickin, Lesley Shannon
DFT
2006
IEEE
143views VLSI» more  DFT 2006»
14 years 1 months ago
Defect Tolerant and Energy Economized DSP Plane of a 3-D Heterogeneous SoC
This paper1 discusses a defect tolerant and energy economized computing array for the DSP plane of a 3-D Heterogeneous System on a Chip. We present the J-platform, which employs c...
Vijay K. Jain, Glenn H. Chapman
HOTOS
2009
IEEE
13 years 11 months ago
Operating Systems Should Provide Transactions
Operating systems can efficiently provide system transactions to user applications, in which user-level processes can execute a series of system calls atomically and in isolation ...
Donald E. Porter, Emmett Witchel
APCCAS
2006
IEEE
373views Hardware» more  APCCAS 2006»
13 years 11 months ago
A New High Precision Low Offset Dynamic Comparator for High Resolution High Speed ADCs
A new low offset dynamic comparator for high resolution high speed analog-to-digital application has been designed. Inputs are reconfigured from the typical differential pair compa...
Vipul Katyal, Randall L. Geiger, Degang Chen
ASPDAC
2008
ACM
92views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Design space exploration for a coarse grain accelerator
- In the design process of a reconfigurable accelerator employing in an embedded system, multitude parameters may result in remarkable complexity and a large design space. Design s...
Farhad Mehdipour, Hamid Noori, Morteza Saheb Zaman...