468 search results - page 23 / 94 » Process Migration Effects on Memory Performance of Multiproc... |
SPAA
2004
ACM
14 years 2 months ago
2004
ACM
Page migration is one of the fundamental subproblems in the framework of data management in networks. It occurs in a distributed network of processors sharing one indivisible memo...
ISCA
1998
IEEE
14 years 1 months ago
1998
IEEE
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
HPCA
2007
IEEE
14 years 3 months ago
2007
IEEE
The significant speed-gap between processor and memory and the limited chip memory bandwidth make last-level cache performance crucial for future chip multiprocessors. To use the...
ICCAD
2003
IEEE
14 years 5 months ago
2003
IEEE
Recent efforts in adapting computer networks into system-on-chip (SOC), or network-on-chip, present a setback to the traditional computer systems for the lack of effective program...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...