Sciweavers

468 search results - page 25 / 94
» Process Migration Effects on Memory Performance of Multiproc...
Sort
View
CODES
2007
IEEE
14 years 3 months ago
Simultaneous synthesis of buses, data mapping and memory allocation for MPSoC
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the targ...
Brett H. Meyer, Donald E. Thomas
ICCAD
2008
IEEE
97views Hardware» more  ICCAD 2008»
14 years 5 months ago
Integrated code and data placement in two-dimensional mesh based chip multiprocessors
— As transistor sizes continue to shrink and the number of transistors per chip keeps increasing, chip multiprocessors (CMPs) are becoming a promising alternative to remain on th...
Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kan...
ISCA
1993
IEEE
112views Hardware» more  ISCA 1993»
14 years 26 days ago
Working Sets, Cache Sizes, and Node Granularity Issues for Large-Scale Multiprocessors
The distribution of resources among processors, memory and caches is a crucial question faced by designers of large-scale parallel machines. If a machine is to solve problems with...
Edward Rothberg, Jaswinder Pal Singh, Anoop Gupta
DFT
1999
IEEE
114views VLSI» more  DFT 1999»
14 years 1 months ago
Yield Enhancement Considerations for a Single-Chip Multiprocessor System with Embedded DRAM
A programmable single-chip multiprocessor system for video coding has been developed. The system is implemented in a high-performance 0.25 m logic/embedded DRAM process. It integr...
Markus Rudack, Dirk Niggemeyer
GECCO
2009
Springer
156views Optimization» more  GECCO 2009»
14 years 3 months ago
Characterizing the genetic programming environment for fifth (GPE5) on a high performance computing cluster
Solving complex, real-world problems with genetic programming (GP) can require extensive computing resources. However, the highly parallel nature of GP facilitates using a large n...
Kenneth Holladay