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RSP
2006
IEEE
102views Control Systems» more  RSP 2006»
14 years 1 months ago
Rapid Resource-Constrained Hardware Performance Estimation
In a hardware-software co-design environment, an application is partitioned into modules. Each module is then mapped either to software or to hardware. The mapping process is driv...
Basant Kumar Dwivedi, Arun Kejariwal, M. Balakrish...
SPRINGSIM
2008
13 years 9 months ago
Data parallel execution challenges and runtime performance of agent simulations on GPUs
Programmable graphics processing units (GPUs) have emerged as excellent computational platforms for certain general-purpose applications. The data parallel execution capabilities ...
Kalyan S. Perumalla, Brandon G. Aaby
LCTRTS
2004
Springer
14 years 1 months ago
Spinach: a liberty-based simulator for programmable network interface architectures
This paper presents Spinach, a new simulator toolset specifically designed to target programmable network interface architectures. Spinach models both system components that are ...
Paul Willmann, Michael Brogioli, Vijay S. Pai
IPPS
2010
IEEE
13 years 5 months ago
Highly scalable parallel sorting
Sorting is a commonly used process with a wide breadth of applications in the high performance computing field. Early research in parallel processing has provided us with comprehen...
Edgar Solomonik, Laxmikant V. Kalé
VLSISP
2008
100views more  VLSISP 2008»
13 years 7 months ago
Memory-constrained Block Processing for DSP Software Optimization
Digital signal processing (DSP) applications involve processing long streams of input data. It is important to take into account this form of processing when implementing embedded ...
Ming-Yung Ko, Chung-Ching Shen, Shuvra S. Bhattach...