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ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
14 years 4 months ago
Simultaneous Scheduling, Binding and Layer Assignment for Synthesis of Vertically Integrated 3D Systems
Three dimensional vertically integrated systems allow active devices to be placed on multiple device layers. In recent years, a number of research efforts have addressed physical ...
Madhubanti Mukherjee, Ranga Vemuri
GLVLSI
2006
IEEE
126views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Hardware/software partitioning of operating systems: a behavioral synthesis approach
In this paper we propose a hardware real time operating system (HW-RTOS) solution that makes use of a dedicated hardware in order to replace the standard support provided by the P...
Sathish Chandra, Francesco Regazzoni, Marcello Laj...
DATE
1997
IEEE
133views Hardware» more  DATE 1997»
13 years 11 months ago
Hierarchical scheduling and allocation of multirate systems on heterogeneous multiprocessors
This paper describes new algorithms for systemlevel software synthesis, namely the scheduling and allocation of a set of complex tasks running at multiple rates on a heterogeneous...
Yanbing Li, Wayne Wolf
SOSP
1989
ACM
13 years 8 months ago
Threads and Input/Output in the Synthesis Kernel
The Synthesis operating system kernel combines several techniques to provide high performa.nce, incl1iding kernel code synthesis, fine-gra.in scheduling. and optimistic sylicllrol...
Henry Massalin, Calton Pu
ASPDAC
2005
ACM
98views Hardware» more  ASPDAC 2005»
14 years 1 months ago
Bitwidth-aware scheduling and binding in high-level synthesis
- Many high-level description languages, such as C/C++ or Java, lack the capability to specify the bitwidth information for variables and operations. Synthesis from these specifica...
Jason Cong, Yiping Fan, Guoling Han, Yizhou Lin, J...