500 search results - page 34 / 100 » Process Scheduling for the Parallel Desktop |
ICPP
2003
IEEE
14 years 2 months ago
2003
IEEE
The bus that connects processors to memory is known to be a major architectural bottleneck in SMPs. However, both software and scheduling policies for these systems generally focu...
HPDC
2002
IEEE
14 years 1 months ago
2002
IEEE
In high energy physics, bioinformatics, and other disciplines, we encounter applications involving numerous, loosely coupled jobs that both access and generate large data sets. So...
IPPS
2002
IEEE
14 years 1 months ago
2002
IEEE
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
BMCBI
2008
13 years 9 months ago
2008
Background: Microarray analysis allows the simultaneous measurement of thousands to millions of genes or sequences across tens to thousands of different samples. The analysis of t...
ISHPC
1997
Springer
14 years 1 months ago
1997
Springer
We propose two resource management methods; a scheduling policy that re
ects resource consumption states and a memory-replacement strategy based on page classi cation under distrib...