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ISCA
2012
IEEE
333views Hardware» more  ISCA 2012»
12 years 1 months ago
Reducing memory reference energy with opportunistic virtual caching
Most modern cores perform a highly-associative translation look aside buffer (TLB) lookup on every memory access. These designs often hide the TLB lookup latency by overlapping it...
Arkaprava Basu, Mark D. Hill, Michael M. Swift
INFOCOM
1997
IEEE
14 years 3 months ago
IP Multicasting for Point-to-Point Local Distribution
While support for IP multicasting continues to spread enabling new applications, an increasing number of hosts connects to the worldwide Internet via low bandwidth Point-toPoint l...
George Xylomenos, George C. Polyzos
CASES
2006
ACM
14 years 4 months ago
Reducing energy of virtual cache synonym lookup using bloom filters
Virtual caches are employed as L1 caches of both high performance and embedded processors to meet their short latency requirements. However, they also introduce the synonym proble...
Dong Hyuk Woo, Mrinmoy Ghosh, Emre Özer, Stua...
DSN
2005
IEEE
14 years 4 months ago
Checking Array Bound Violation Using Segmentation Hardware
The ability to check memory references against their associated array/buffer bounds helps programmers to detect programming errors involving address overruns early on and thus avo...
Lap-Chung Lam, Tzi-cker Chiueh
COMPCON
1995
IEEE
14 years 2 months ago
IEEE 1394: A Ubiquitous Bus
A link is an unreliable FIFO channel. As we mentioned earlier, it is an abstraction of a point-topoint wire or of a simple broadcast LAN. It is unreliable because noise or other ph...
Gary Hoffman, Daniel Moore