In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
Petar Radojkovic, Vladimir Cakarevic, Javier Verd&...
abstraction rules that hide the complexity of systems of components. We've begun this process in the domain of sensor/actuator network applications, observing that in manyappl...
We present a methodology to debug a SOC by concentrating on its communication. Our extended communication model includes a) multiple signal groups per interface protocol at each I...
Modern network devices employ deep packet inspection to enable sophisticated services such as intrusion detection, traffic shaping, and load balancing. At the heart of such servi...
Randy Smith, Neelam Goyal, Justin Ormont, Karthike...
Next-generation high-end Network Processors (NP) must address demands from both diversified applications and ever-increasing traffic pressure. One major challenge is to design an e...
Lei Shi, Yue Zhang 0006, Jianming Yu, Bo Xu, Bin L...