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PPOPP
2010
ACM
14 years 2 months ago
Thread to strand binding of parallel network applications in massive multi-threaded systems
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
Petar Radojkovic, Vladimir Cakarevic, Javier Verd&...
EXPERT
2006
84views more  EXPERT 2006»
13 years 8 months ago
Infrastructure for Engineered Emergence on Sensor/Actuator Networks
abstraction rules that hide the complexity of systems of components. We've begun this process in the domain of sensor/actuator network applications, observing that in manyappl...
Jacob Beal, Jonathan Bachrach
NOCS
2008
IEEE
14 years 2 months ago
Debugging Distributed-Shared-Memory Communication at Multiple Granularities in Networks on Chip
We present a methodology to debug a SOC by concentrating on its communication. Our extended communication model includes a) multiple signal groups per interface protocol at each I...
Bart Vermeulen, Kees Goossens, Siddharth Umrani
ISPASS
2009
IEEE
14 years 2 months ago
Evaluating GPUs for network packet signature matching
Modern network devices employ deep packet inspection to enable sophisticated services such as intrusion detection, traffic shaping, and load balancing. At the heart of such servi...
Randy Smith, Neelam Goyal, Justin Ormont, Karthike...
INFOCOM
2007
IEEE
14 years 2 months ago
On the Extreme Parallelism Inside Next-Generation Network Processors
Next-generation high-end Network Processors (NP) must address demands from both diversified applications and ever-increasing traffic pressure. One major challenge is to design an e...
Lei Shi, Yue Zhang 0006, Jianming Yu, Bo Xu, Bin L...