852 search results - page 41 / 171 » Programmable Packet Scheduling |
131
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DELTA
2008
IEEE
15 years 8 months ago
2008
IEEE
Scheduling of concurrent processors in a real-time image processing system on FPGA (Field programmable gate array) hardware is a not a trivial task. We propose a number of graphic...
110
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CN
2004
15 years 2 months ago
2004
Differentiated services (DiffServ) is an architecture for the Internet in which various applications are supported using a simple classification scheme. Packets entering the DiffS...
114
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FCCM
2003
IEEE
15 years 7 months ago
2003
IEEE
A module has been implemented in Field Programmable Gate Array (FPGA) hardware that scans the content of Internet packets at Gigabit/second rates. All of the packet processing ope...
115
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CN
2006
15 years 2 months ago
2006
Quality of service (QoS) provisioning for dynamically composable software elements in a programmable router has not received much attention. We present a router platform that supp...
120
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FOCS
2003
IEEE
15 years 7 months ago
2003
IEEE
The essence of an Internet router is an n ¡ n switch which routes packets from input to output ports. Such a switch can be viewed as a bipartite graph with the input and output p...