Scheduling of concurrent processors in a real-time image processing system on FPGA (Field programmable gate array) hardware is a not a trivial task. We propose a number of graphic...
Christopher T. Johnston, Paul J. Lyons, Donald G. ...
Differentiated services (DiffServ) is an architecture for the Internet in which various applications are supported using a simple classification scheme. Packets entering the DiffS...
A module has been implemented in Field Programmable Gate Array (FPGA) hardware that scans the content of Internet packets at Gigabit/second rates. All of the packet processing ope...
James Moscola, John W. Lockwood, Ronald Prescott L...
Quality of service (QoS) provisioning for dynamically composable software elements in a programmable router has not received much attention. We present a router platform that supp...
Seung Chul Han, Puneet Zaroo, David K. Y. Yau, Yu ...
The essence of an Internet router is an n ¡ n switch which routes packets from input to output ports. Such a switch can be viewed as a bipartite graph with the input and output p...
Gagan Aggarwal, Rajeev Motwani, Devavrat Shah, An ...