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FPL
2006
Springer
242views Hardware» more  FPL 2006»
13 years 11 months ago
TMD-MPI: An MPI Implementation for Multiple Processors Across Multiple FPGAs
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
Manuel Saldaña, Paul Chow
IPPS
2005
IEEE
14 years 1 months ago
User Transparent Parallel Processing of the 2004 NIST TRECVID Data Set
The Parallel-Horus framework, developed at the University of Amsterdam, is a unique software architecture that allows non-expert parallel programmers to develop fully sequential m...
Frank J. Seinstra, Cees Snoek, Dennis Koelma, Jan-...
IPPS
2005
IEEE
14 years 1 months ago
Building on a Framework: Using FG for More Flexibility and Improved Performance in Parallel Programs
We describe new features of FG that are designed to improve performance and extend the range of computations that fit into its framework. FG (short for Framework Generator) is a ...
Elena Riccio Davidson, Thomas H. Cormen
HPCC
2005
Springer
14 years 28 days ago
Factory: An Object-Oriented Parallel Programming Substrate for Deep Multiprocessors
Abstract. Recent advances in processor technology such as Simultaneous Multithreading (SMT) and Chip Multiprocessing (CMP) enable parallel processing on a single die. These process...
Scott Schneider, Christos D. Antonopoulos, Dimitri...
PDCAT
2004
Springer
14 years 23 days ago
View-Oriented Parallel Programming and View-Based Consistency
Abstract. This paper proposes a novel View-Oriented Parallel Programming style for parallel programming on cluster computers. ViewOriented Parallel Programming is based on Distribu...
Zhiyi Huang, Martin K. Purvis, Paul Werstein