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ENTCS
2006
97views more  ENTCS 2006»
13 years 8 months ago
VyrdMC: Driving Runtime Refinement Checking with Model Checkers
This paper presents VyrdMC, a runtime verification tool we are building for concurrent software components. The correctness criterion checked by VyrdMC is refinement: Each executi...
Tayfun Elmas, Serdar Tasiran
EURODAC
1994
IEEE
209views VHDL» more  EURODAC 1994»
14 years 19 days ago
MOS VLSI circuit simulation by hardware accelerator using semi-natural models
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
Victor V. Denisenko
PLDI
2012
ACM
11 years 11 months ago
Effective parallelization of loops in the presence of I/O operations
Software-based thread-level parallelization has been widely studied for exploiting data parallelism in purely computational loops to improve program performance on multiprocessors...
Min Feng, Rajiv Gupta, Iulian Neamtiu
LICS
1996
IEEE
14 years 19 days ago
Reactive Modules
We present a formal model for concurrent systems. The model represents synchronous and asynchronous components in a uniform framework that supports compositional (assume-guarantee)...
Rajeev Alur, Thomas A. Henzinger
ICFP
2005
ACM
14 years 8 months ago
AtomCaml: first-class atomicity via rollback
We have designed, implemented, and evaluated AtomCaml, an extension to Objective Caml that provides a synchronization primitive for atomic (transactional) execution of code. A fir...
Michael F. Ringenburg, Dan Grossman