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CDES
2006
98views Hardware» more  CDES 2006»
13 years 10 months ago
Instruction Fetch Energy Reduction Using Forward-Branch Bufferable Innermost Loop Buffer
Recently, several loop buffer designs have been proposed to reduce instruction fetch energy due to size and location advantage of loop buffer. Nevertheless, on design complexity di...
Bin-Hua Tein, I-Wei Wu, Chung-Ping Chung
JMLR
2012
11 years 11 months ago
Sparse Higher-Order Principal Components Analysis
Traditional tensor decompositions such as the CANDECOMP / PARAFAC (CP) and Tucker decompositions yield higher-order principal components that have been used to understand tensor d...
Genevera Allen
JMLR
2012
11 years 11 months ago
Beyond Logarithmic Bounds in Online Learning
We prove logarithmic regret bounds that depend on the loss L∗ T of the competitor rather than on the number T of time steps. In the general online convex optimization setting, o...
Francesco Orabona, Nicolò Cesa-Bianchi, Cla...
SEMCO
2008
IEEE
14 years 3 months ago
Mobile Mashups: Thoughts, Directions, and Challenges
The twin mainstream computing shifts of mobility and programable Web are fundamentally impacting how humans interact, socialize, and access information. Never before has computing...
E. Michael Maximilien
POPL
2002
ACM
14 years 9 months ago
Role analysis
We present a new role system in which the type (or role) of each object depends on its referencing relationships with other objects, with the role changing as these relationships ...
Viktor Kuncak, Patrick Lam, Martin C. Rinard