558 search results - page 84 / 112 » Programming the FlexRAM parallel intelligent memory system |
114
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HPCN
1994
Springer
15 years 6 months ago
1994
Springer
Abstract. High Performance Fortran (hpf) is a data-parallel Fortran for Distributed Memory Multiprocessors. Hpf provides an interesting programming model but compilers are yet to c...
158
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ICS
2010
Tsinghua U.
15 years 4 months ago
2010
Tsinghua U.
The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs) have ...
136
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ICPP
1999
IEEE
15 years 6 months ago
1999
IEEE
There has been much work recently on improving the locality performance of loop nests in scientific programs through the use of loop as well as data layout optimizations. However,...
125
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CASES
2001
ACM
15 years 6 months ago
2001
ACM
With the widening performance gap between processors and main memory, efficient memory accessing behavior is necessary for good program performance. Loop partition is an effective...
157
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IWOMP
2007
Springer
15 years 8 months ago
2007
Springer
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...