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ATAL
2010
Springer
13 years 8 months ago
Verifying agents with memory is harder than it seemed
ATL+ is a variant of alternating-time temporal logic that does not have the expressive power of full ATL , but still allows for expressing some natural properties of agents. It ha...
Nils Bulling, Wojciech Jamroga
PADL
2009
Springer
14 years 9 months ago
Declarative Network Verification
Abstract. In this paper, we present our initial design and implementation of a declarative network verifier (DNV). DNV utilizes theorem proving, a well established verification tec...
Anduo Wang, Prithwish Basu, Boon Thau Loo, Oleg So...
ISCAS
2003
IEEE
135views Hardware» more  ISCAS 2003»
14 years 1 months ago
Formal verification of LTL formulas for SystemC designs
To handle today’s complexity, modern circuits and systems be specified at a high level of abstraction. Recently, SystemC has been proposed as a language that allows a fast on o...
Daniel Große, Rolf Drechsler
CVPR
2007
IEEE
14 years 10 months ago
Combining Static Classifiers and Class Syntax Models for Logical Entity Recognition in Scanned Historical Documents
Class syntax can be used to 1) model temporal or locational evolvement of class labels of feature observation sequences, 2) correct classification errors of static classifiers if ...
Song Mao, Praveer Mansukhani, George R. Thoma
TIME
2005
IEEE
14 years 2 months ago
A Trace Semantics for Positive Core XPath
— We provide a novel trace semantics for positive core XPath that exposes all intermediate nodes visited by the query engine. This enables a detailed analysis of all information ...
Pieter H. Hartel