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BMCBI
2010
140views more  BMCBI 2010»
13 years 11 months ago
Quantification and deconvolution of asymmetric LC-MS peaks using the bi-Gaussian mixture model and statistical model selection
Background: Liquid chromatography-mass spectrometry (LC-MS) is one of the major techniques for the quantification of metabolites in complex biological samples. Peak modeling is on...
Tianwei Yu, Hesen Peng
TCAD
2008
101views more  TCAD 2008»
13 years 10 months ago
Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors
Functional correctness is a vital attribute of any hardware design. Unfortunately, due to extremely complex architectures, widespread components, such as microprocessors, are often...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
ASPLOS
2004
ACM
14 years 4 months ago
An ultra low-power processor for sensor networks
We present a novel processor architecture designed specifically for use in low-power wireless sensor-network nodes. Our sensor network asynchronous processor (SNAP/LE) is based on...
Virantha N. Ekanayake, Clinton Kelly IV, Rajit Man...
ISCA
1999
IEEE
124views Hardware» more  ISCA 1999»
14 years 3 months ago
The Block-Based Trace Cache
The trace cache is a recently proposed solution to achieving high instruction fetch bandwidth by buffering and reusing dynamic instruction traces. This work presents a new block-b...
Bryan Black, Bohuslav Rychlik, John Paul Shen
ARCS
2010
Springer
14 years 5 months ago
How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT
This paper describes how a superscalar in-order processor must be modified to support Simultaneous Multithreading (SMT) such that time-predictability is preserved for hard real-ti...
Jörg Mische, Irakli Guliashvili, Sascha Uhrig...