352 search results - page 61 / 71 » Quantifying Instruction Criticality |
RTSS
2006
IEEE
14 years 1 months ago
2006
IEEE
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
NIXDORF
1992
13 years 11 months ago
1992
We present some quantitative performance measurements for the computing power of Programmable Active Memories (PAM), as introduced by [2]. Based on Field Programmable Gate Array (...
ASPDAC
2001
ACM
13 years 11 months ago
2001
ACM
Hardware/software partitioning is one of the key processes in a hardware/software cosynthesis system for digital signal processor cores. In hardware/software partitioning, area and...
ISCA
1995
IEEE
13 years 11 months ago
1995
IEEE
For many programs, especially integer codes, untolerated load instruction latencies account for a significant portion of total execution time. In this paper, we present the desig...
ASPLOS
2011
ACM
12 years 11 months ago
2011
ACM
Concurrency bugs are caused by non-deterministic interleavings between shared memory accesses. Their effects propagate through data and control dependences until they cause softwa...