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MICRO
2010
IEEE
173views Hardware» more  MICRO 2010»
13 years 5 months ago
Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?
To extend the exponential performance scaling of future chip multiprocessors, improving energy efficiency has become a first-class priority. Single-chip heterogeneous computing ha...
Eric S. Chung, Peter A. Milder, James C. Hoe, Ken ...
ICCAD
2007
IEEE
148views Hardware» more  ICCAD 2007»
14 years 4 months ago
Fast exact Toffoli network synthesis of reversible logic
— The research in the field of reversible logic is motivated by its application in low-power design, optical computing and quantum computing. Hence synthesis of reversible logic...
Robert Wille, Daniel Große
HAPTICS
2003
IEEE
14 years 25 days ago
Levels of Detail in Reducing Cost of Haptic Rendering: A Preliminary User Study
Haptic rendering complex objects in virtual environments is computationally intensive. In this paper we start the investigation of a new category of approach to reducing the compu...
Jian Zhang, Shahram Payandeh, John Dill
CLUSTER
2010
IEEE
12 years 11 months ago
Middleware support for many-task computing
Many-task computing aims to bridge the gap between two computing paradigms, high throughput computing and high performance computing. Many-task computing denotes highperformance co...
Ioan Raicu, Ian T. Foster, Mike Wilde, Zhao Zhang,...
BMCBI
2010
198views more  BMCBI 2010»
13 years 7 months ago
ClustalXeed: a GUI-based grid computation version for high performance and terabyte size multiple sequence alignment
Background: There is an increasing demand to assemble and align large-scale biological sequence data sets. The commonly used multiple sequence alignment programs are still limited...
Taeho Kim, Hyun Joo