Errors in estimating page counts can lead to poor choice of access methods and in turn to poor quality plans. Although there is past work in using execution feedback for accurate c...
Surajit Chaudhuri, Vivek R. Narasayya, Ravishankar...
This paper presents a helper thread prefetching scheme that is designed to work on loosely-coupled processors, such as in a standard chip multi-processor (CMP) system and in an in...
Changhee Jung, Daeseob Lim, Jaejin Lee, Yan Solihi...
State-space caching is a veri cation technique for nite-state concurrent systems. It performs an exhaustive exploration of the state space of the system being checked while storin...
Patrice Godefroid, Gerard J. Holzmann, Didier Piro...
Due to the rapid growth in the size of the web, web search engines are facing enormous performance challenges. The larger engines in particular have to be able to process tens of ...
Streamlining communication is key to achieving good performance in shared-memory parallel programs. While full hardware support for cache coherence generally offers the best perfo...