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ARVLSI
1997
IEEE
104views VLSI» more  ARVLSI 1997»
13 years 12 months ago
A High-Speed Asynchronous Decompression Circuit for Embedded Processors
This paper describes the architecture and implementation of a high-speed decompression engine for embedded processors. The engine is targeted to processors where embedded programs...
Martin Benes, Andrew Wolfe, Steven M. Nowick
IPPS
1996
IEEE
13 years 11 months ago
Parallel Algorithms for Image Enhancement and Segmentation by Region Growing with an Experimental Study
This paper presents e cient and portable implementations of a useful image enhancement process, the Symmetric Neighborhood Filter SNF, and an image segmentation technique which ma...
David A. Bader, Joseph JáJá, David H...
CCS
2007
ACM
13 years 11 months ago
Analyzing network traffic to detect self-decrypting exploit code
Remotely-launched software exploits are a common way for attackers to intrude into vulnerable computer systems. As detection techniques improve, remote exploitation techniques are...
Qinghua Zhang, Douglas S. Reeves, Peng Ning, S. Pu...
CEC
2007
IEEE
13 years 11 months ago
A multi-layered solution for supporting isp traffic demand using genetic algorithm
This paper proposes a unique feedback governed multi layered architectural model to support ISP's traffic demands with multiple Quality of Service(QoS) constraints. The propos...
Gajaruban Kandavanam, Dmitri Botvich, Sasitharan B...
PDP
2010
IEEE
13 years 11 months ago
Malleable-Lab: A Tool for Evaluating Adaptive Online Schedulers on Malleable Jobs
—The emergence of multi-core computers has led to explosive development of parallel applications and hence the need of efficient schedulers for parallel jobs. Adaptive online sc...
Yangjie Cao, Hongyang Sun, Wen-Jing Hsu, Depei Qia...