High-performance microprocessors, e.g., multithreaded and multicore processors, are being implemented in embedded real-time systems because of the increasing computational require...
Diana Bautista, Julio Sahuquillo, Houcine Hassan, ...
— In this paper, we present an O(1) time-complexity packet scheduling algorithm which we call G-3 that provides bounded end-to-end delay for fixed size packet networks. G-3 is b...
In this paper we propose an FPGA implementation of a multi protocol Weighted Fair (WF) queuing algorithm able to handle variable length packets targeted for Packet Over Sonet (POS...
We propose a cluster-based web server where a few computing nodes are separately reserved for high-performance computing applications, such as multimedia, SSL, and CGI. As an exam...
We propose using least attained service (LAS) scheduling in network routers to prevent some connections against utilizing all or a large fraction of network bandwidth. This phenome...
Idris A. Rai, Guillaume Urvoy-Keller, Ernst W. Bie...