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WDAG
2010
Springer
216views Algorithms» more  WDAG 2010»
13 years 6 months ago
A Scalable Lock-Free Universal Construction with Best Effort Transactional Hardware
The imminent arrival of best-effort transactional hardware has spurred new interest in the construction of nonblocking data structures, such as those that require atomic updates to...
Francois Carouge, Michael F. Spear
ERSA
2009
147views Hardware» more  ERSA 2009»
13 years 6 months ago
Fault Avoidance in Medium-Grain Reconfigurable Hardware Architectures
Medium-grain reconfigurable hardware (MGRH) architectures represent a hybrid between the versatility of a field programmable gate array (FPGA) and the computational power of a cust...
Kylan Robinson, José G. Delgado-Frias
CISC
2009
Springer
186views Cryptology» more  CISC 2009»
13 years 6 months ago
Hardware Framework for the Rabbit Stream Cipher
Rabbit is a software-oriented synchronous stream cipher with very strong security properties and support for 128-bit keys. Rabbit is part of the European Union's eSTREAM portf...
Deian Stefan
VLSISP
2010
119views more  VLSISP 2010»
13 years 3 months ago
Hardware Acceleration of HMMER on FPGAs
We propose a new parallelization scheme for the hmmsearch function of the HMMER software, in order to target FPGA technology. hmmsearch is a very compute intensive software for bio...
Steven Derrien, Patrice Quinton
ICASSP
2011
IEEE
13 years 4 days ago
A flexible high-throughput hardware architecture for a gaussian noise generator
In this paper a exible, high-throughput, low-complexity additive white gaussian noise (AWGN) channel generator is presented. The proposed generator employs a Mersenne-Twister to g...
Ioannis Paraskevakos, Vassilis Paliouras