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» RTOS Modeling for System Level Design
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PG
2003
IEEE
15 years 9 months ago
OPENNPAR: A System for Developing, Programming, and Designing Non-Photorealistic Animation and Rendering
The notable amount and variation of current techniques in non-photorealistic rendering (NPR) indicates a level of maturity whereby the categorization of algorithms has become poss...
Nick Halper, Tobias Isenberg, Felix Ritter, Bert F...
SIES
2010
IEEE
15 years 1 months ago
Verification of a CAN bus model in SystemC with functional coverage
Abstract--Many heterogeneous embedded systems, for example industrial automation and automotive applications, require hard-real time constraints to be exhaustively verified - which...
Christoph Kuznik, Gilles B. Defo, Wolfgang Mü...
HASE
2008
IEEE
15 years 4 months ago
Aiding Modular Design and Verification of Safety-Critical Time-Triggered Systems by Use of Executable Formal Specifications
Designing safety-critical systems is a complex process, and especially when the design is carried out at different f abstraction where the correctness of the design at one level i...
Kohei Sakurai, Péter Bokor, Neeraj Suri
JUCS
2007
86views more  JUCS 2007»
15 years 3 months ago
Improving LO Quality through Instructional Design Based on an Ontological Model and Metadata
: The activities developed in this paper were aimed at providing an awareness of the elements that should be considered in quality learning objects instructional design for elearni...
Erla Morales Morgado, Francisco José Garc&i...
BIRTHDAY
2006
Springer
15 years 7 months ago
Realistic Worst-Case Execution Time Analysis in the Context of Pervasive System Verification
We describe a gate level design of a FlexRay-like bus interface. An electronic control unit (ECU) is obtained by integrating this interface into the design of the verified VAMP pro...
Steffen Knapp, Wolfgang J. Paul