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VLSID
2002
IEEE
95views VLSI» more  VLSID 2002»
14 years 8 months ago
Design of an On-Chip Test Pattern Generator without Prohibited Pattern Set (PPS)
| This paper reports the design of a Test Pattern Generator (TPG) for VLSI circuits. The onchip TPG is so designed that it generates test patterns while avoiding generation of a gi...
Niloy Ganguly, Biplab K. Sikdar, Parimal Pal Chaud...
ASYNC
1997
IEEE
66views Hardware» more  ASYNC 1997»
13 years 12 months ago
Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders
This paper presents an in-depth case study in highperformance asynchronous adder design. A recent method, called “speculative completion”, is used. This method uses single-rai...
Steven M. Nowick, Kenneth Y. Yun, Ayoob E. Dooply,...
ICRA
2002
IEEE
92views Robotics» more  ICRA 2002»
14 years 20 days ago
Resolution Complete Rapidly-Exploring Random Trees
Trajectory design for high-dimensional systems with nonconvex constraints is a challenging problem considered in this paper. Classical dynamic programming is often employed, but c...
Peng Cheng, Steven M. LaValle
VLSID
2009
IEEE
119views VLSI» more  VLSID 2009»
14 years 8 months ago
Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded Systems
Abstract-- Single-ended static random access memory (SESRAM) is well known for their tremendous potential of low active power and leakage dissipations. In this paper, we present a ...
Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhi...
CCR
2008
99views more  CCR 2008»
13 years 7 months ago
The resource pooling principle
Since the ARPAnet, network designers have built localized mechanisms for statistical multiplexing, load balancing, and failure resilience, often without understanding the broader ...
Damon Wischik, Mark Handley, Marcelo Bagnulo Braun