Sciweavers

403 search results - page 24 / 81
» Rationale and Design of BULK
Sort
View
HOTI
2005
IEEE
14 years 3 months ago
Control Path Implementation for a Low-Latency Optical HPC Switch
— A crucial part of any high-performance computing system is its interconnection network. In the OSMOSIS project, Corning and IBM are jointly developing a demonstrator interconne...
Cyriel Minkenberg, François Abel, Peter M&u...
POPL
1994
ACM
14 years 1 months ago
A Type System for Prototyping Languages
Rapide is a programming language framework designed for the development of large, concurrent, real-time systems by prototyping. The framework consists of a type language and defau...
Dinesh Katiyar, David C. Luckham, John C. Mitchell
AGI
2008
13 years 11 months ago
VARIAC: an Autogenous Cognitive Architecture
Learning theory and programs to date are inductively bounded: they can be described as "wind-up toys" which can only learn the kinds of things that their designers envisi...
J. Storrs Hall
ISCAS
2005
IEEE
140views Hardware» more  ISCAS 2005»
14 years 3 months ago
A 16-bit low-power microcontroller with monolithic MEMS-LC clocking
Abstract—Low-power, single-chip integrated systems are prevailing in remote applications due to the increasing power and delay cost of inter-chip communication compared to on-chi...
Robert M. Senger, Eric D. Marsman, Michael S. McCo...
CHI
2009
ACM
14 years 2 months ago
Supporting content and process common ground in computer-supported teamwork
We build on our prior work with computer-supported teams performing a complex decision-making task on maps, where the distinction between content and process common ground is prop...
Gregorio Convertino, Helena M. Mentis, Mary Beth R...