2 search results - page 1 / 1 » Razor: A Low-Power Pipeline Based on Circuit-Level Timing Sp... |
MICRO
2003
IEEE
14 years 3 days ago
2003
IEEE
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
GLVLSI
2010
IEEE
13 years 12 months ago
2010
IEEE
Processors have traditionally been designed for the worst-case, resulting in designs that have high yields, but are expensive in terms of area and power. Better-than-worst-case (B...