28 search results - page 1 / 6 » Reachability Analysis for Formal Verification of SystemC |
DSD
2002
IEEE
14 years 4 months ago
2002
IEEE
FMCAD
2004
Springer
14 years 2 months ago
2004
Springer
The main challenge in BDD-based verification is dealing with the memory explosion problem during reachability analysis. In this paper we advocate a methodology to handle this probl...
FORMATS
2009
Springer
14 years 2 months ago
2009
Springer
Probabilistic timed automata (PTAs) are used for formal modelling and verification of systems with probabilistic, nondeterministic and real-time behaviour. For non-probabilistic ti...
EMSOFT
2010
Springer
13 years 9 months ago
2010
Springer
SystemC is the de facto standard for modeling embedded systems. It allows system design at various levels of abstractions, provides typical object-orientation features and incorpo...
CAV
2004
Springer
14 years 2 months ago
2004
Springer
Abstract. The existence of functional dependency among the state variables of a state transition system was identified as a common cause of inefficient BDD representation in formal...