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ACSD
2004
IEEE
113views Hardware» more  ACSD 2004»
13 years 11 months ago
Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
CAV
2010
Springer
206views Hardware» more  CAV 2010»
13 years 10 months ago
Dynamic Cutoff Detection in Parameterized Concurrent Programs
We consider the class of finite-state programs executed by an unbounded number of replicated threads communicating via shared variables. The thread-state reachability problem for t...
Alexander Kaiser, Daniel Kroening, Thomas Wahl
CONCUR
2004
Springer
13 years 11 months ago
Extended Process Rewrite Systems: Expressiveness and Reachability
Abstract. We unify a view on three extensions of Process Rewrite Systems (PRS) and compare their expressive power with that of PRS. We show that the class of Petri nets is less exp...
Mojmír Kretínský, Vojtech Reh...
APN
2005
Springer
14 years 29 days ago
High Level Petri Nets Analysis with Helena
This paper presents the high level Petri nets analyzer Helena. Helena can be used for the on-the-fly verification of state properties, i.e., properties that must hold in all the ...
Sami Evangelista
CONCUR
2000
Springer
13 years 11 months ago
LP Deadlock Checking Using Partial Order Dependencies
Model checking based on the causal partial order semantics of Petri nets is an approach widely applied to cope with the state space explosion problem. One of the ways to exploit su...
Victor Khomenko, Maciej Koutny