186 search results - page 30 / 38 » Real-Time Distributed Discrete-Event Execution with Fault To... |
PROCEDIA
2010
13 years 2 months ago
2010
One of the greatest challenges in computational chemistry is the design of enzymes to catalyze non-natural chemical reactions. We focus on harnessing the distributed parallel comp...
HPDC
2011
IEEE
12 years 11 months ago
2011
IEEE
In today’s high performance computing practice, fail-stop failures are often tolerated by checkpointing. While checkpointing is a very general technique and can often be applied...
ISCA
2012
IEEE
11 years 10 months ago
2012
IEEE
The reliability of future processors is threatened by decreasing transistor robustness. Current architectures focus on delivering high performance at low cost; lifetime device rel...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
ACE analysis is a technique to provide an early reliability estimate for microprocessors. ACE analysis couples data from performance models with low level design details to identi...
ASPLOS
2009
ACM
14 years 8 months ago
2009
ACM
Future processors are expected to observe increasing rates of hardware faults. Using Dual-Modular Redundancy (DMR), two cores of a multicore can be loosely coupled to redundantly ...