551 search results - page 61 / 111 » Realizability of Real-Time Logics |
174
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IPPS
2006
IEEE
15 years 12 months ago
2006
IEEE
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
172
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ROBOCUP
1999
Springer
15 years 10 months ago
1999
Springer
In this paper, we present a multi-layered architecture for spatial and temporal agents. The focus is laid on the declarativity of the approach, which makes agent scripts expressive...
148
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ICCAD
1995
IEEE
15 years 9 months ago
1995
IEEE
: A new approach to optimize multi-level logic circuits is introduced. Given a multi-level circuit, the synthesis method optimizes its area, simultaneously enhancing its random pat...
166
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EUSFLAT
2003
15 years 7 months ago
2003
Ultraprecision turning is a manufacturing process used to generate a high surface roughness in precision components, and its input-output relationships are highly nonlinear. Surfa...
176
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DSN
2005
IEEE
15 years 11 months ago
2005
IEEE
It is now widely accepted that the CMOS technology implementing irreversible logic will hit a scaling limit beyond 2016, and that the increased power dissipation is a major limiti...