Sciweavers

551 search results - page 81 / 111
» Realizability of Real-Time Logics
Sort
View
CORR
2010
Springer
196views Education» more  CORR 2010»
13 years 7 months ago
Low Power Reversible Parallel Binary Adder/Subtractor
In recent years, Reversible Logic is becoming more and more prominent technology having its applications in Low Power CMOS, Quantum Computing, Nanotechnology, and Optical Computin...
H. G. Rangaraju, U. Venugopal, K. N. Muralidhara, ...
COGSCI
2006
86views more  COGSCI 2006»
13 years 7 months ago
Deferred Interpretations: Why Starting Dickens is Taxing but Reading Dickens Isn't
Comprehenders often need to go beyond conventional word senses to obtain an appropriate interpretation of an expression. We report an experiment examining the processing of standa...
Brian McElree, Steven Frisson, Martin J. Pickering
CADE
2006
Springer
14 years 7 months ago
CEL - A Polynomial-Time Reasoner for Life Science Ontologies
CEL (Classifier for EL) is a reasoner for the small description logic EL+ which can be used to compute the subsumption hierarchy induced by EL+ ontologies. The most distinguishing ...
Franz Baader, Carsten Lutz, Boontawee Suntisrivara...
ICOIN
2004
Springer
14 years 23 days ago
On Layered VPN Architecture for Enabling User-Based Multiply Associated VPNs
Abstract. In our previous work, we have proposed a new VPN architecture for enabling user-based multiply associated VPNs [1]. Almost all existing VPN technologies assume that users...
Yoshihiro Hara, Hiroyuki Ohsaki, Makoto Imase, Yos...
SAMOS
2004
Springer
14 years 23 days ago
A Novel Data-Path for Accelerating DSP Kernels
A high-performance data-path to implement DSP kernels is proposed in this paper. The data-path is based on a flexible, universal, and regular component to optimally exploiting both...
Michalis D. Galanis, George Theodoridis, Spyros Tr...