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» Reasoning about Duplicate Elimination with Description Logic
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ECBS
2008
IEEE
124views Hardware» more  ECBS 2008»
13 years 9 months ago
Hierarchical Model to Develop Component-Based Systems
Large and complex software systems require expressive notations for representing their software architecture. In this context Architecture Description Languages (ADLs) can be used...
Abdelkrim Amirat, Mourad Oussalah
CL
2000
Springer
13 years 11 months ago
Modelling Digital Circuits Problems with Set Constraints
A number of diagnostic and optimisation problems in Electronics Computer Aided Design have usually been handled either by specific tools or by mapping them into a general problem s...
Francisco Azevedo, Pedro Barahona
TMC
2012
11 years 9 months ago
Fast Data Collection in Tree-Based Wireless Sensor Networks
—We investigate the following fundamental question—how fast can information be collected from a wireless sensor network organized as tree? To address this, we explore and evalu...
Özlem Durmaz Incel, Amitabha Ghosh, Bhaskar K...
TABLEAUX
2000
Springer
13 years 11 months ago
Benchmark Analysis with FaCT
FaCT (Fast Classification of Terminologies) is a Description Logic (DL) classifier that can also be used for modal logic satisfiability testing. The FaCT system includes two reason...
Ian Horrocks
IEEEHPCS
2010
13 years 5 months ago
Semantic model checking security requirements for web services
Model checking is a formal verification method widely accepted in the web service world because of its capability to reason about service behaviors, at their process-level. It ha...
L. Boaro, E. Glorio, Francesco Pagliarecci, Luca S...