193 search results - page 18 / 39 » Reasoning about Memory Layouts |
HPCA
1998
IEEE
14 years 2 months ago
1998
IEEE
Scalable shared-memory multiprocessors that are designed as Cache-Only Memory Architectures Coma allow automatic replication and migration of data in the main memory. This enhance...
ASPLOS
2011
ACM
13 years 1 months ago
2011
ACM
nt, user-defined objects present an attractive abstraction for working with non-volatile program state. However, the slow speed of persistent storage (i.e., disk) has restricted ...
ISPASS
2008
IEEE
2008
IEEE
An Analysis of I/O And Syscalls In Critical Sections And Their Implications For Transactional Memory
14 years 4 months ago
Transactional memory (TM) is a scalable and concurrent way to build atomic sections. One aspect of TM that remains unclear is how side-effecting operations – that is, those whic...
POPL
2009
ACM
14 years 10 months ago
2009
ACM
Transactional memory (TM) is a promising paradigm for concurrent programming. Whereas the number of TM implementations is growing, however, little research has been conducted to p...
ISI
2006
Springer
13 years 9 months ago
2006
Springer
An intelligence analyst often needs to keep track of more facts than can be held in human memory. As a result, analysts use a notebook or evidence file to record facts learned so f...