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» Reasoning about Memory Layouts
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DFT
2006
IEEE
130views VLSI» more  DFT 2006»
14 years 1 months ago
Off-Chip Control Flow Checking of On-Chip Processor-Cache Instruction Stream
Control flow checking (CFC) is a well known concurrent checking technique for ensuring that a program’s instruction execution sequence follows permissible paths. Almost all CFC...
Federico Rota, Shantanu Dutt, Sahithi Krishna
PLDI
2003
ACM
14 years 18 days ago
Automatically proving the correctness of compiler optimizations
We describe a technique for automatically proving compiler optimizations sound, meaning that their transformations are always semantics-preserving. We first present a domainspeci...
Sorin Lerner, Todd D. Millstein, Craig Chambers
ICS
2003
Tsinghua U.
14 years 17 days ago
AEGIS: architecture for tamper-evident and tamper-resistant processing
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, M...
HOTOS
1993
IEEE
13 years 11 months ago
Object Groups May Be Better Than Pages
I argue against trying to solve the problem of clustering objects into disk pages. Instead, I propose that objects be fetched in groups that may be specific to an application or ...
Mark Day
POPL
1989
ACM
13 years 11 months ago
How to Make ad-hoc Polymorphism Less ad-hoc
raction that a programming language provides influences the structure and algorithmic complexity of the resulting programs: just imagine creating an artificial intelligence engine ...
Philip Wadler, Stephen Blott