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FPL
2000
Springer
116views Hardware» more  FPL 2000»
13 years 10 months ago
FPGA Implementation of a Prototype WDM On-Line Scheduler
Message sequencing and channel assignment are two important aspects to consider in optimizing the performance of Wavelength Division Multiplexing (WDM) networks. A scheduling techn...
Winnie W. Cheng, Steven J. E. Wilton, Babak Hamidz...
ICAI
2004
13 years 8 months ago
A User Centered Evolutionary Scheduling Framework
The need for supporting CSCW applications with heterogeneous and varying user requirements call for adaptive and reconfigurable schedulers accommodating a mixture of real-time, pro...
Horst Wedde, Muddassar Farooq, Mario Lischka
INFOCOM
2002
IEEE
13 years 11 months ago
Guaranteed Scheduling for Switches with Configuration Overhead
—In this paper, we present three algorithms that provide performance guarantees for scheduling switches, such as optical switches, with configuration overhead. Each algorithm emu...
Brian Towles, William J. Dally
IPPS
1998
IEEE
13 years 11 months ago
PACE: Processor Architectures for Circuit Emulation
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Reiner Kolla, Oliver Springauf
FPGA
2009
ACM
154views FPGA» more  FPGA 2009»
14 years 1 months ago
Synthesis of reconfigurable high-performance multicore systems
Reconfigurable high-performance computing systems (RHPC) have been attracting more and more attention over the past few years. RHPC systems are a promising solution for accelerati...
Jason Cong, Karthik Gururaj, Guoling Han