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ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
14 years 4 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
CVPR
2012
IEEE
11 years 10 months ago
A tiered move-making algorithm for general pairwise MRFs
A large number of problems in computer vision can be modeled as energy minimization problems in a markov random field (MRF) framework. Many methods have been developed over the y...
Vibhav Vineet, Jonathan Warrell, Philip H. S. Torr
ICPP
2006
IEEE
14 years 1 months ago
A Parallel External-Memory Frontier Breadth-First Traversal Algorithm for Clusters of Workstations
— This paper presents a parallel external-memory algorithm for performing a breadth-first traversal of an implicit graph on a cluster of workstations. The algorithm is a paralle...
Robert Niewiadomski, José Nelson Amaral, Ro...
SAC
2004
ACM
14 years 1 months ago
A new algorithm for gap constrained sequence mining
The sequence mining problem consists in finding frequent sequential patterns in a database of time-stamped events. Several application domains require limiting the maximum tempor...
Salvatore Orlando, Raffaele Perego, Claudio Silves...
IPPS
1996
IEEE
13 years 11 months ago
A Parallel Algorithm for Minimization of Finite Automata
In this paper, we present a parallel algorithm for the minimization of deterministic finite state automata (DFA's) and discuss its implementation on a connection machine CM-5...
Bala Ravikumar, X. Xiong