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» Reconfigurable Systems Enabled by a Network-on-Chip
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ASAP
2008
IEEE
167views Hardware» more  ASAP 2008»
14 years 2 months ago
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms
Process technology has reduced in size such that it is possible to implement complete applicationspecific architectures as Systems-on-Chip (SoCs) using both Application-Specific I...
David Dickin, Lesley Shannon
DATE
2010
IEEE
110views Hardware» more  DATE 2010»
14 years 29 days ago
An RDL-configurable 3D memory tier to replace on-chip SRAM
—In a conventional SoC designs, on-chip memories occupy more than the 50% of the total die area. 3D technology enables the distribution of logic and memories on separate stacked ...
Marco Facchini, Paul Marchal, Francky Catthoor, Wi...
BROADCOM
2008
IEEE
14 years 2 months ago
Versatile, Stationary/Mobile Low-Cost Telecommunication System
We describe a low-cost, versatile microstrip antenna to be used for terrestrial to satellite fixed and mobile point to point links at Ku-band. The Ku band has recently attracted a...
Dan Busuioc, Safieddin Safavi-Naeini
ICSE
2000
IEEE-ACM
13 years 11 months ago
Software engineering and middleware: a roadmap
The construction of a large class of distributed systems can be simplified by leveraging middleware, which is layered between network operating systems and application components....
Wolfgang Emmerich
EJASP
2010
92views more  EJASP 2010»
13 years 2 months ago
Optimized Paraunitary Filter Banks for Time-Frequency Channel Diagonalization
We adopt the concept of channel diagonalization to time-frequency signal expansions obtained by DFT filter banks. As a generalization of the frequency domain channel representatio...
Ziyang Ju, Thomas Hunziker, Dirk Dahlhaus