Domain-partition (DP) model is a general model for reliability maximization problem under given redundancy. In this paper, an improved DP model is used to formulate a reconfigurati...
Several projects have developed compiler tools that translate high-level languages down to hardware description languages for mapping onto FPGAbased reconfigurable computers. Thes...
Dhananjay Kulkarni, Walid A. Najjar, Robert Rinker...
This paper presents the porting of an RTOS Micro C/OS-II on a novel reconfigurable instruction cell based architecture which fills the gap between DSP, FPGA and ASIC with high per...
Han Wei, Mark Muir, Ioannis Nousias, Tughrul Arsla...
Abstract: The goals of the interdisciplinary project HORN were as well to improve competitiveness of service providers that deliver grocery items as to develop new hardware and sof...
: This paper introduces negative application conditions for reconfigurable place/transition nets. These are Petri nets together with a set of rules that allow changing the net and ...
Alexander Rein, Ulrike Prange, Leen Lambers, Kathr...