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ASPDAC
1995
ACM
116views Hardware» more  ASPDAC 1995»
15 years 9 months ago
A datapath synthesis system for the reconfigurable datapath architecture
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
Reiner W. Hartenstein, Rainer Kress
ISVLSI
2003
IEEE
118views VLSI» more  ISVLSI 2003»
15 years 11 months ago
Reconfigurable Fast Memory Management System Design for Application Specific Processors
This paper presents the design and implementation of the new Active Memory Manager Unit (AMMU) designed to be embedded into System-on-Chip CPUs. The unit is implemented using VHDL...
S. Kagan Agun, J. Morris Chang
DDECS
2007
IEEE
143views Hardware» more  DDECS 2007»
16 years 10 days ago
Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...
Pavel Kubalík, Jirí Kvasnicka, Hana ...
ICRA
2002
IEEE
120views Robotics» more  ICRA 2002»
15 years 11 months ago
A Hierarchical Motion Planning Strategy for a Uniform Self-Reconfigurable Modular Robotic System
This paper describes a multi-layered hierarchical motion planning strategy for a class of self-reconfigurable modular robotic systems, I-Cubes. The approach is based on the synthe...
Konstantine C. Prevas, Cem Ünsal, Mehmet &Oum...
RSP
2000
IEEE
156views Control Systems» more  RSP 2000»
15 years 10 months ago
Quasi-Static Scheduling of Reconfigurable Dataflow Graphs for DSP Systems
Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools...
Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya