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» Reconfigurable trusted computing in hardware
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HOTOS
2003
IEEE
14 years 24 days ago
Certifying Program Execution with Secure Processors
Cerium is a trusted computing architecture that protects a program’s execution from being tampered while the program is running. Cerium uses a physically tamperresistant CPU and...
Benjie Chen, Robert Morris
CARDIS
2010
Springer
162views Hardware» more  CARDIS 2010»
13 years 10 months ago
On the Design and Implementation of an Efficient DAA Scheme
Abstract. Direct Anonymous Attestation (DAA) is an anonymous digital signature scheme that aims to provide both signer authentication and privacy. One of the properties that makes ...
Liqun Chen, Dan Page, Nigel P. Smart
FPGA
2004
ACM
174views FPGA» more  FPGA 2004»
14 years 27 days ago
A compiled accelerator for biological cell signaling simulations
The simulation of large systems of biochemical reactions is a key part of research into molecular signaling and information processing in biological cells. However, it can be impr...
John F. Keane, Christopher Bradley, Carl Ebeling
ASAP
2008
IEEE
145views Hardware» more  ASAP 2008»
14 years 2 months ago
An MPSoC architecture for the Multiple Target Tracking application in driver assistant system
This article discusses the design of an application specific MPSoC architecture dedicated to Multiple Target Tracking (MTT). This application has its utility in driver assistant s...
Jehangir Khan, Smaïl Niar, Atika Rivenq, Yass...
FPL
2004
Springer
89views Hardware» more  FPL 2004»
14 years 27 days ago
HW/SW Co-design by Automatic Embedding of Complex IP Cores
Complex SoC and platform-based designs require integration of configurable IP cores from multiple sources. Even automatic compilation flows from a high-level description to HW/SW s...
Holger Lange, Andreas Koch